Memory chip

The CAT24C08 is an EEPROM serial 8-Kb I2C device internally organized as 64 pages of 16 bytes each. The device supports standard (100 kHz) protocol as well as fast (400 kHz) I2C protocol. Data is written by providing a start address, then loading 1 to 16 consecutive bytes into the page write cache, and then writing all the data to non-volatile memory in an internal write cycle. The way to read data is: provide the start address, then move out the data in order, and automatically increment the internal address count at the same time. External address pins enable addressing of up to two CAT24C08 devices on the same bus.

512Mbit, 1bit ECC, 528Byte page size, can directly replace Samsung, Hynix K9F1208U0C HY27US08121A