Logic device/transceiver/encoder

The high-performance silicon-gate CMOS MC74HC03A has the same pin-out as the LS03. The device inputs are compatible with standard CMOS outputs; with pull-up resistors it is compatible with LSTTL outputs. The HC03A NAND gate has a high performance MOS N-channel transistor as output. Therefore this NAND gate can be used for wired AND applications with appropriate pull-up resistors. The output characteristic curve of this device is shown in this datasheet. It can be used as an LED driver or any other application that only needs to sink current.

The MC74VHC1GT32 is an advanced high-speed CMOS 2-input OR gate fabricated in a silicon-gate CMOS process. It achieves high-speed operation similar to an equivalent bipolar Schottky TTL while maintaining CMOS low power consumption. This internal circuit consists of three stages including a buffer output that provides high noise immunity and stable output. The device inputs are compatible with TTL type input thresholds and the outputs have full 5 V CMOS level output swings. The input protection circuitry on this device allows for overvoltage tolerance on the inputs allowing this device to be used as a logic level translator from 3.0 V CMOS logic to 5.0 V CMOS logic or from 1.8 V CMOS logic to 3.0 V CMOS logic with high Operates under voltage power supply. The MC74VHC1GT32 input structure provides protection when voltages up to 5.5V are applied regardless of the supply voltage. This allows the MC74VHC1GT32 to be used to interface 5V circuits to 3V circuits. The output structure also provides protection when VCC = 0V. These input and output structures help prevent device damage due to supply voltage - input/output voltage mismatch, battery backup, hot insertion, etc.

4-Channel, 2-Input, 3V to 5.5V XOR Gate 16-PDIP -40 to 85

4-Channel, 2-Input, 4.5V to 5.5V AND Gate 14-SOIC -40 to 125 with TTL Compatible CMOS Inputs

4-Channel, 2-Input, 4.5V to 5.5V NAND Gate with TTL Compatible CMOS Inputs 14-SOIC -40 to 85

4-Channel, 2-Input, 4.5V to 5.5V NOR Gate with TTL Compatible CMOS Inputs 14-TSSOP -40 to 85

4-bit Magnitude Comparator 16-TSSOP -55 to 125

The MC14043B and MC14044B quad R-S latches are constructed using MOS P-channel and N-channel enhancement mode devices in a monolithic structure. Each latch has an independent Q output as well as set and reset inputs. The Q output is gated through a three-state buffer with a common enable input. These outputs are enabled with a logic '1' or high on the enable input; a logic '0' or low will latch from the Q output port, creating an open circuit at the Q output.

Octal Transparent D-Latch with 3-State Output 20-TSSOP -40 to 85