Logic device/transceiver/encoder

The LCX652 contains a bus transceiver circuit with D-type flip-flops, and the control circuit is configured to provide multiplexed data transfers directly from the input bus or from internal registers. Data on the A or B bus is clocked into the registers as the appropriate clock pin goes to a high logic level. Output enable pins (OEAB, OEBA#) are provided to control transceiver functions. The LCX652 is designed for low voltage (2.5V or 3.3V) V

Enhanced Product 4-Channel, 4.5-V to 5.5-V Buffer 14-SOIC -40 to 125 with TTL Compatible CMOS Inputs and 3-State Outputs

8-Channel, 2V to 6V Buffer with 3-State Outputs 20-SOIC -55 to 125

6-Channel, 2V to 6V Inverter 16-SOIC -55 to 125