Logic device/transceiver/encoder

20-Channel, 4.5-V to 5.5-V Buffer with TTL Compatible CMOS Inputs and 3-State Outputs 56-TSSOP -40 to 85

The MC10/100EP33 is an integrated divide-by-4 divider. Differential clock input. Only the VBB pin, the internally generated supply voltage, is provided for this device. For the single-ended input case, the unused differential input is tied to VBB as the switch reference voltage. VBB can also re-bias the AC-coupled input. When used, decouple VBB and VCC through a 0.01 uF capacitor and limit the current source or sink to 0.5mA. VBB should be left open when not in use. The reset pin is asynchronous and asserted on the rising edge. On power up, the internal flip-flop will reach a random state; reset to synchronize multiple EP33s in a system. The 100 series includes temperature compensation.

Parallel Load 8-Bit Serial Shift Register 16-PDIP 0 to 70